/*
 * @Author: Laputa
 * @Version: V0.0
 * @Date: 2023-12-06 17:53:52
 * @LastEditors: Laputa
 * @LastEditTime: 2023-12-27 17:24:19
 * @Description:This file provides firmware functions to manage the following
 *              functionalities of the CCM part.
 * 
 *              WakeUp Source Control Function
 *              PWM Pin Pull Down Control Function
 *              QSPI XIP Control Function
 *              QSPI CS Pin Initialize
 *              Chip SRAM Shut Off Control
 *
 * Copyright (c) 2023 by Levetop, All Rights Reserved.
 */

#include "lt168_ccm.h"

/*******************************************************************************
 * Code
 ******************************************************************************/
/**
 * @brief Controls Wake Source wake function Enable or Disable.
 * @param {ccm_wakeup_source_te} source:wakeup source,where can be CCM_Wakeup_EPORT0_0,
 *        CCM_Wakeup_EPORT0_1,...,CCM_Wakeup_EPORT2_3.
 * @param {FunctionState} state:where can be Enable,Disable.
 * @return {void}
 */
void CCM_WakeUp_Source_Cmd(ccm_wakeup_source_te source, FunctionState state)
{
    Bit_Clear(CCM->WKUPC, 1 << source);
    Bit_Set(CCM->WKUPC, state << source);
}
/**
 * @brief Controls PWM Pin Pull Down Enable or Disable.
 * @param {ccm_pwm_pin_pulldown_te} pin:PWM Pin,where can be CCM_PWM_Pin_PullDown_pwm1_0,
 *         CCM_PWM_Pin_PullDown_pwm1_1,...,CCM_PWM_Pin_PullDown_pwm0_3.
 * @param {FunctionState} state:where can be Enable,Disable.
 * @return {*}
 */
void CCM_PWM_Pin_PullDown_Cmd(ccm_pwm_pin_pulldown_te pin, FunctionState state)
{
    Bit_Clear(CCM->CPPDC, 1 << pin);
    Bit_Set(CCM->CPPDC, state << pin);
}
/**
 * @brief Controls XIP Function Enable or Disable.
 * @param {qspi *} target:where can be QSPI0,QSPI1,QSPI2.
 * @param {FunctionState} state:where can be Enable,Disable.
 * @return {void}
 */
void XIP_Cmd(qspi *target, FunctionState state)
{
    uint8_t r_bit = ((((((uint32_t)(target)) - 0x60000000) >> 28) + 1) * 8);
    Bit_Clear(CCM->QSPIXIPMCFR, 1 << r_bit);
    Bit_Set(CCM->QSPIXIPMCFR, state << r_bit);
}
/**
 * @brief:Controls XIP Data Encryption Function Enable or Disable.
 * @param {qspi *} target:where can be QSPI0,QSPI1,QSPI2.
 * @param {FunctionState} state:where can be Enable,Disable.
 * @return {*}
 */
void XIP_Data_Encryption_Cmd(qspi *target, FunctionState state)
{
    uint8_t r_bit = ((((((uint32_t)(target)) - 0x60000000) >> 28) + 1) * 8) + 1;
    Bit_Clear(CCM->QSPIXIPMCFR, 1 << r_bit);
    Bit_Set(CCM->QSPIXIPMCFR, state << r_bit);
}
/**
 * @brief XIP Data Encryption Key.
 * @param {uint32_t} key:32bits secret key.
 * @return {void}
 */
void XIP_Encryption_Key(uint32_t key)
{
    CCM->QSPILKEYR = key;
}

/**
 * @brief QSPI CS Pin Initialize
 * @param {qspi *} target:where can be QSPI0,QSPI1,QSPI2.
 * @param {ccm_qspi_cs_gpio_type_te} type:where can be CCM_QSPI_CS_GPIO_Disable,CCM_QSPI_CS_GPIO_Enable.
 * @param {ccm_qspi_cs_pullup_te} pullup:where can be CCM_QSPI_CS_GPIO_NO_Pullup,CCM_QSPI_CS_GPIO_Pullup.
 * @param {ccm_qspi_cs_direction_te} dir:where can be CCM_QSPI_CS_GPIO_Input,CCM_QSPI_CS_GPIO_Output.
 * @return {void}
 */
void QSPI_CS_Init(qspi *target, ccm_qspi_cs_gpio_type_te type, ccm_qspi_cs_pullup_te pullup, ccm_qspi_cs_direction_te dir)
{
    uint8_t r_bit = ((((uint32_t)(target)) - 0x60000000) >> 28);

    /* GPIOEN */
    Bit_Clear(CCM->QSPIGPIOCR, 1 << r_bit + 29);
    Bit_Set(CCM->QSPIGPIOCR, type << r_bit + 29);

    /* PUE */
    Bit_Clear(CCM->QSPIGPIOCR, 1 << r_bit + 24);
    Bit_Set(CCM->QSPIGPIOCR, type << r_bit + 24);

    /* OBE */
    Bit_Clear(CCM->QSPIGPIOCR, 1 << r_bit + 16);
    Bit_Set(CCM->QSPIGPIOCR, type << r_bit + 16);
}

/**
 * @brief QSPI CS Pin Output Value. 
 * @param {qspi *} target:where can be QSPI0,QSPI1,QSPI2.
 * @param {BitStatus} status:Output Value,can be Reset or Set.
 * @return {void}
 */
void QSPI_CS_GPIO_Write(qspi *target,BitStatus status)
{
    uint8_t r_bit = ((((uint32_t)(target)) - 0x60000000) >> 28);

    /* DO */
    Bit_Clear(CCM->QSPIGPIOCR, 1 << r_bit + 8);
    Bit_Set(CCM->QSPIGPIOCR, status << r_bit + 8);
}
/**
 * @brief Chip SRAM Shut Off Control
 * @param {ccm_sram_te} sram:chip sram,where can be CCM_SYSRAM0,CCM_SYSRAM1,...,CCM_CACHERAM.
 * @param {FunctionState} state:where can be Enable,Disable.
 * @return {void}
 */
//void CCM_SRAM_ShutOff_Cmd(ccm_sram_te sram, FunctionState state)
//{
//    CCM->U32_MCU_RAM_PRIOCR = (CCM->U32_MCU_RAM_PRIOCR & ~CCM_MCURAMPRIOCR_RAMPRIOTEST_MASK) | (CCM_MCURAMPRIOCR_RAMPRIOTEST(1U)); /* Unlock register */
//    CCM->U32_MCU_RAM_PRIOCR = (CCM->U32_MCU_RAM_PRIOCR & ~CCM_MCURAMPRIOCR_RAMPRIOTEST_MASK) | (CCM_MCURAMPRIOCR_RAMPRIOTEST(2U)); /* Unlock register */
//    CCM->U32_MCU_RAM_PRIOCR = (CCM->U32_MCU_RAM_PRIOCR & ~CCM_MCURAMPRIOCR_RAMPRIOTEST_MASK) | (CCM_MCURAMPRIOCR_RAMPRIOTEST(3U)); /* Unlock register */
//
//    /* ISOEN */
//    Bit_Clear(CCM->U32_MCU_RAM_PRIOCR, 1 << sram + 16);
//    Bit_Set(CCM->U32_MCU_RAM_PRIOCR, state << sram + 16);
//
//    /* PD */
//    Bit_Clear(CCM->U32_MCU_RAM_PRIOCR, 1 << sram + 24);
//    Bit_Set(CCM->U32_MCU_RAM_PRIOCR, state << sram + 24);
//
//    Bit_Clear(CCM->U32_MCU_RAM_PRIOCR, CCM_MCURAMPRIOCR_RAMPRIOTEST_MASK); /* Lock register */
//}
/*!<---------------End of Code--------------->!*/
